The present disclosure relates to the field of accessing system registers in a data processing apparatus.
In a data processing apparatus, a context switch is performed to change the process that is currently executing on the processing circuitry. The process may be another application, the context switch being performed by the operating system. Where virtualisation is used, the process may be a guest operating system, with the context switch being performed by a hypervisor or host operating system.
One or more system registers are used to control the behaviour of the data processing apparatus. Each process can have its own set of values for these system registers. Consequently, when a context switch occurs, it is necessary to swap out the current values of those system registers, e.g. by saving them to data storage circuitry and to swap in values associated with the process that is next to execute on the processing circuitry.
The process of swapping values in and out of system registers can require numerous processor cycles, particularly if there are many system registers. One way in which this problem can be solved is to increase the number of pipelines for handling system register accesses. However, this is not always a desirable, since it increases the size of the processor core and can lead to an increase in power consumption.
Since context switches can occur many times per second, it is desirable to speed up the process of saving and loading the system registers in order to speed up the context switch time, without significantly increasing the size of the processor core.